Time and Location
- 2:30-3:00 Presentation “Getting your hands dirty with the Xilinx Zynq-7000 AP SoC”
– Innovation Hall
- 3:00-4:30 Hands on Workshop – Innovation Hall
- 4:30-6:00 Hands on Workshop – Innovation Hall
Getting your hands dirty with the Xilinx Zynq-7000 AP SoC
Presenter’s name and small bio
Name: Tim Duffy
Bio: Tim attended RIT for Computer Engineering Technology out of the ECTET department. Tim currently works for Avnet locally at the Henrietta, NY branch. Avnet is the world’s largest distributor of electronic components. Tim is a Field Applications Engineer (FAE) covering Xilinx for western New York. Tim is passionate about open source software as well as open knowledge. Tim also has worked with the FOSS box within the RIT Innovation center.
With the demand for computing power every increasing, Xilinx has released their new Zynq-7000 All Programmable System on Chip device. The Zynq-7000 family of ARM Processor sub-systems plus Field Programmable Gate Array (FPGA) fabric brings an unparalleled amount of processing power and customization to any project. Get down and dirty with the Zynq-7020 device on the Avnet Zedboard development system with your instructor Tim Duffy.
We will touch on:
- The Xilinx tools
- Echo-system and where to find out information
- A “Hello World!” Lab.
Software required (Software, version, license,…)
Download of the newest Xilinx tools, version 14.3 and licensed for the WebPack. (link here: http://www.xilinx.com/support/download/index.htm). I can work with anyone who has concerns or questions about this. I can also send you a link to a simple how-to for installing the software and getting it licensed.
Also A Terminal software package such as TeraTerm or HyperTerminal.
Hardware required (computer, monitors, connectors, adapters, memory cards …)
A Zedboard (available at the seminar) and a computer/laptop running Windows XP 32 bit, Windows 7 32 or 64 bit, or Linux 32 or 64 bit (Ubuntu, CentOS, Fedora, Redhat are known to work with our software). Two (2) micro USB cables for downloading code to the Zedboard and communicating via the UART. A Ethernet cable to connect to the Zedboard as well would be nice, however I can provide those if needed.
Number of boards that will be available for the workshop?
5 possibly 10.
Number of Workshops to teach (max 2)
Any time constraints?
I would prefer to keep them to 1 or 1.5 hours. I find that 1.5 is a nice amount of time that allows for question asking as well as plenty of time to get the lab completed.
Prizes for students (workshop attendees, raffles, door prizes,….)
Give-aways at the table, and depending on availability a development kit or two to give away as well.
Check out http://zynqgeek.zedboard.org/ for how-to’s on using your Zynq-7000 AP SoC system!